Biruk B. Seyoum

• Present

  Associate Research Scientist

  System-Level Design Group, Columbia University · New York, NY, USA

  Lead architect of ESP, the group's open-source platform for heterogeneous SoC design. Working with Prof. Luca P. Carloni on reconfigurable and partially reconfigurable SoC architectures.

• 2021

  Ph.D., Emerging Digital Technologies

  Scuola Superiore Sant'Anna — Real-Time Systems (ReTiS) Laboratory · Pisa, Italy

  Dissertation: Design Methods for Partially Reconfigurable FPGA-Based SoCs and Their Applications for Accelerating Deep Neural Networks. Advisors: Prof. Giorgio Buttazzo and Prof. Alessandro Biondi.

• M.Sc., Telecommunications and Electronics

  University of Trento · Trento, Italy

  Thesis work on energy-neutral wireless sensing for safety-critical fasteners, with Prof. Davide Brunelli.

• B.Sc., Electrical and Computer Engineering

  Addis Ababa Institute of Technology · Addis Ababa, Ethiopia

See the full list →

• Reconfigurable computing
• FPGA accelerators
• FPGA CAD tools
• System-level design
• Heterogeneous SoC architectures
• FPGA-based DNN acceleration

• Luca P. CarloniColumbia University
• Giorgio ButtazzoScuola Superiore Sant'Anna
• Alessandro BiondiScuola Superiore Sant'Anna
• Ryan KastnerUC San Diego
• Davide BrunelliUniversity of Trento
• Maurizio RossiUniversity of Trento
• Pierre-Emmanuel GaillardonUniversity of Utah